About the role
**Please note this role is only open to candidates currently located in and with working rights to the UK**
Location: Preferably based at one of our UK design centres (Bristol or Cambridge).
Welcome to Codasip
At Codasip, we’re redefining the future of computing. Following a bold strategic pivot toward cyber-resilient semiconductor architectures, we are building next-generation processors and systems where security is embedded at the very core by design, not as an afterthought. As we expand our portfolio of secure, CHERI-enabled technologies and focus on delivering architecture-first security solutions, there has never been a more exciting time to join. We are embarking on clean-sheet designs and expanding the teams of engineers who can establish high-quality working practices as they explore new ground. Be part of a global team shaping the next era of secure computing where innovation, ownership, and impact go hand in hand.
The impact you’ll make
As a DV Manager, you will confront the technical challenges inherent in expanding our Verification team and capacity over multiple Design Centers. Your role will be pivotal in shaping our company's strategy, focusing on both project aspects and broader organizational goals. We are looking for a proactive leader who can share the workload with other Verification Leads, motivating and guiding our engineers to achieve their full potential. You will:
* Lead the expansion of our Verification team and capacity over multiple Design Centers, building on top of established foundations and aligning efforts with company strategy and objectives. * Collaborate with other Verification Leads to share responsibilities, ensuring effective management of workload and resources. * Verify RISC-V processors and extensions. * Take ownership of IP Verification projects. * Contribute to determining the company’s strategy regarding verification. * Tackle the challenges unique to Codasip and its customizable IP portfolio. * Provide technical leadership and guidance to the Verification team, building a culture of excellence in Verification methodologies and processes. * Partner with cross-functional teams to optimize collaboration and streamline project execution. * Stay abreast of industry trends and advancements, leveraging insights to drive innovation and maintain our competitive edge.
What You Bring to The Table
* Extensive experience in semiconductor Verification with a desire to transition to the manager stream. * Significant commercial experience with a variety of functional processor verification methodologies as applied to CPU or other ASIC verification (simulators, coverage collection, gate level simulation, etc.). * Knowledge of verifying CPU architectures or other complex IPs (GPUs, NNAs). * Proven ability to manage workload effectively and prioritize tasks in a dynamic environment. * Excellent leadership and communication skills, with the ability to motivate and inspire teams. * Understanding of RISC-V Architecture. * Knowledge of computer systems and architecture. * Experience with advanced verification techniques.
Join Our Team
If you are a strong and proactive leader/manager who thrives on technical challenges and is passionate about driving the expansion of Verification capabilities, we want to hear from you! Join us in shaping the future of technology and making a meaningful impact. Apply now to become a key player in our dynamic team.
Get to Know Us
Codasip announces strategic pivot and divestiture
CHERI-RISC-V standardisation status - Tariq Kurd | CHERITech'25
Why Codasip went all‑in on CHERI – CHERI Alliance